Thinning of silicon wafers and GaAs wafers, substrates and dice
Ultra-Thin Silicon Wafers and Gallium Arsenide Wafers
Valley Design Corporation has developed a process and is supplying on a regular basis, ultra-thin Silicon and GaAs (with circuitry) precision lapped or (CMP), chemically-mechanically polished.
Substrates as thin as 10 microns thick with circuitry were completed. A recent order called for 5″ diameter wafers of 3 mil thickness (polished on both sides). Valley Design offers a complete line of lapped, polished and diced substrates, Sapphire, Glass, flat optical pieces and other electro-optical materials.
Scratch/Dig |
Angstroms Ra |
Microinches Ra |
10/5 |
10A |
.040u” |
20/10 |
20A |
.080u” |
40/20 |
30A |
.12u” |
60/40 |
40A |
.16u” |
80/50 |
50A |
.2u” |
Note: Approximate optical scratch/dig and Ra relationship for surface finishes.
Wafer, chip, dice, die thinning related Web sites: